ORCID Profile
0000-0002-1488-4762
Current Organisation
Zhejiang University
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Publisher: IEEE
Date: 09-11-2020
Publisher: IEEE
Date: 09-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2018
Publisher: IEEE
Date: 09-2016
Publisher: China Power Supply Society
Date: 06-2018
Publisher: IEEE
Date: 05-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2021
Publisher: MDPI AG
Date: 21-07-2019
DOI: 10.3390/EN12142802
Abstract: Partial shading on photovoltaic (PV) arrays reduces the overall output power and causes multiple maximas on the output power characteristics. Due to the introduction of multiple maximas, mismatch power losses become apparent among multiple PV modules. These mismatch power losses are not only a function of shading characteristics, but also depend on the placement and interconnection patterns of the shaded modules within the array. This research work is aimed to assess the performance of 4 × 4 PV array under different shading conditions. The desired objective is to attain the maximum output power from PV modules at different possible shading patterns by using power electronic-based differential power processing (DPP) techniques. Various PV array interconnection configurations, including the series-parallel (SP), total-cross-tied (TCT), bridge-linked (BL), and center-cross-tied (CCT) are considered under the designed shading patterns. A comparative performance analysis is carried out by analyzing the output power from the DPP-based architecture and the traditional Schottky diode-based architecture. Simulation results show the gain in the output power by using the DPP-based architecture in comparison to the traditional bypassing diode method.
Publisher: IEEE
Date: 09-2016
Publisher: Wiley
Date: 23-03-2021
DOI: 10.1002/CTA.3004
Abstract: This paper proposes a new switched‐capacitor nine‐level (9L) inverter with reduced switch count. In the proposed topology, floating capacitor (FC) is employed as a voltage booster, and it does not need any additional sensors to maintain the voltage across the FC. Due to additional FC, the number of dc sources and voltage stress on switches is reduced. Moreover, the proposed topology can be cascaded to achieve more voltage levels. Various parameters are considered in the comparison of the proposed topology with other recent switched‐capacitor topologies. Simulation and experimental results demonstrate the performance with different load and modulation index variations.
Publisher: Institution of Engineering and Technology (IET)
Date: 07-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 06-2019
Publisher: IEEE
Date: 10-2017
Publisher: IEEE
Date: 11-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 08-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 03-2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 04-2017
Publisher: MDPI AG
Date: 15-11-2021
DOI: 10.3390/ELECTRONICS10222801
Abstract: This paper proposes two improved cascaded H-bridge (ICHB) multilevel inverters that feature voltage-boosting capability. The conventional H-bridge with a front-end dc–dc boost converter was restructured for single-stage operation. The developed three-level topology not only saves one power switch but also exhibits lower voltage stress across its capacitor. Extension to five-level generation was also introduced by merely adding two power switches and one capacitor. The final five-level topology outperforms the classical cascaded H-bridge (CHB) multilevel inverter with a significant reduction in the power switch count, with a 42% and 50% reduction in both the isolated dc source and inductor counts. The power efficiency was also improved without compromising the modularity feature of the classical CHB multilevel inverter. The operation and theoretical analysis of the proposed topologies were validated via simulations and experimental tests.
Publisher: MDPI AG
Date: 11-02-2019
DOI: 10.3390/APP9030582
Abstract: The paper investigates the system efficiency for power distribution in residential localities considering daily load variations. Relevant system modeling is presented. A mathematical model is devised, which is based on the data from the Energy Information Administration (EIA), USA, for analysis. The results reveal that the DC distribution system can present an equivalent or even better efficiency compared to the AC distribution network with an efficiency advantage of 2.3%, averaged over a day. Furthermore, the distribution systems are compared under various capacities of solar PV accounting for the effect of variation in solar irradiation over time.
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 03-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2021
Publisher: Institution of Engineering and Technology
Date: 2016
DOI: 10.1049/CP.2016.0246
Publisher: IEEE
Date: 09-2018
Publisher: IEEE
Date: 03-2019
Publisher: Institution of Engineering and Technology (IET)
Date: 03-07-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 05-2021
Publisher: IEEE
Date: 09-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 05-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 03-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2020
Publisher: IEEE
Date: 05-2016
Publisher: IEEE
Date: 03-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2018
Publisher: IEEE
Date: 09-2015
Publisher: Institution of Engineering and Technology
Date: 2020
Publisher: Institution of Engineering and Technology (IET)
Date: 26-08-2021
DOI: 10.1049/PEL2.12181
Publisher: IEEE
Date: 03-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 06-2023
Publisher: CRC Press
Date: 18-05-2017
Publisher: Institution of Engineering and Technology (IET)
Date: 16-02-2018
Publisher: MDPI AG
Date: 10-05-2021
DOI: 10.3390/ELECTRONICS10091121
Abstract: A reconfiguration technique using a switched-capacitor (SC)-based voltage equalizer differential power processing (DPP) concept is proposed in this paper for photovoltaic (PV) systems at a cell/subpanel anel-level. The proposed active diffusion charge redistribution (ADCR) architecture increases the energy yield during mismatch and adds a voltage boosting capability to the PV system under no mismatch by connected the available PV cells anels in series. The technique performs a reconfiguration by measuring the PV cell anel voltages and their irradiances. The power balancing is achieved by charge redistribution through SC under mismatch conditions, e.g., partial shading. Moreover, PV cells anels remain in series under no mismatch. Overall, this paper analyzes, simulates, and evaluates the effectiveness of the proposed DPP architecture through a simulation-based model prepared in PSIM. Additionally, the effectiveness is also demonstrated by comparing it with existing conventional DPP and traditional bypass diode architecture.
Publisher: IEEE
Date: 09-2016
Publisher: IEEE
Date: 06-2017
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 07-2023
Publisher: IEEE
Date: 03-2017
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 06-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 07-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 07-2017
Publisher: IEEE
Date: 09-2019
No related grants have been discovered for Yongheng Yang.