ORCID Profile
0000-0003-2512-0079
Current Organisation
Technische Universiteit Delft
Does something not look right? The information on this page has been harvested from data sources that may not be up to date. We continue to work with information providers to improve coverage and quality. To report an issue, use the Feedback Form.
Publisher: Springer Science and Business Media LLC
Date: 25-11-2019
DOI: 10.1038/S41565-019-0590-Z
Abstract: An amendment to this paper has been published and can be accessed via a link at the top of the paper.
Publisher: Springer Science and Business Media LLC
Date: 29-03-2022
DOI: 10.1038/S41928-022-00727-9
Abstract: Full-scale quantum computers require the integration of millions of qubits, and the potential of using industrial semiconductor manufacturing to meet this need has driven the development of quantum computing in silicon quantum dots. However, fabrication has so far relied on electron-beam lithography and, with a few exceptions, conventional lift-off processes that suffer from low yield and poor uniformity. Here we report quantum dots that are hosted at a 28 Si/ 28 SiO 2 interface and fabricated in a 300 mm semiconductor manufacturing facility using all-optical lithography and fully industrial processing. With this approach, we achieve nanoscale gate patterns with excellent yield. In the multi-electron regime, the quantum dots allow good tunnel barrier control—a crucial feature for fault-tolerant two-qubit gates. Single-spin qubit operation using magnetic resonance in the few-electron regime reveals relaxation times of over 1 s at 1 T and coherence times of over 3 ms.
Publisher: American Physical Society (APS)
Date: 13-06-2014
Publisher: American Chemical Society (ACS)
Date: 04-09-2012
DOI: 10.1021/NL302558B
Abstract: Stacking of two-dimensional electron gases (2DEGs) obtained by δ-doping of Ge and patterned by scanning probe lithography is a promising approach to realize ultrascaled 3D epitaxial circuits, where multiple layers of active electronic components are integrated both vertically and horizontally. We use atom probe tomography and magnetotransport to correlate the real space 3D atomic distribution of dopants in the crystal with the quantum correction to the conductivity observed at low temperatures, probing if closely stacked δ-layers in Ge behave as independent 2DEGs. We find that at a separation of 9 nm the stacked-2DEGs, while interacting, still maintain their in iduality in terms of electron transport and show long phase coherence lengths (∼220 nm). Strong vertical electron confinement is crucial to this finding, resulting in an interlayer scattering time much longer (∼1000 × ) than the scattering time within the dopant plane.
Publisher: AIP
Date: 2013
DOI: 10.1063/1.4848461
Publisher: Springer Science and Business Media LLC
Date: 27-04-2022
Publisher: AIP
Date: 2007
DOI: 10.1063/1.2730107
Publisher: AIP Publishing
Date: 28-08-2023
DOI: 10.1063/5.0158262
Abstract: We grow strained Ge/SiGe heterostructures by reduced-pressure chemical vapor deposition on 100 mm Ge wafers. The use of Ge wafers as substrates for epitaxy enables high-quality Ge-rich SiGe strain-relaxed buffers with a threading dislocation density of (6±1)×105 cm−2, nearly an order of magnitude improvement compared to control strain-relaxed buffers on Si wafers. The associated reduction in short-range scattering allows for a drastic improvement of the disorder properties of the two-dimensional hole gas, measured in several Ge/SiGe heterostructure field-effect transistors. We measure an average low percolation density of (1.22±0.03)×1010 cm−2 and an average maximum mobility of (3.4±0.1)×106 cm2/Vs and quantum mobility of (8.4±0.5)×104 cm2/Vs when the hole density in the quantum well is saturated to (1.65±0.02)×1011 cm−2. We anticipate immediate application of these heterostructures for next-generation, higher-performance Ge spin-qubits, and their integration into larger quantum processors.
Publisher: Springer Science and Business Media LLC
Date: 19-05-2020
DOI: 10.1038/S41534-020-0274-4
Abstract: Continuing advancements in quantum information processing have caused a paradigm shift from research mainly focused on testing the reality of quantum mechanics to engineering qubit devices with numbers required for practical quantum computation. One of the major challenges in scaling toward large-scale solid-state systems is the limited input/output (I/O) connectors present in cryostats operating at sub-kelvin temperatures required to execute quantum logic with high fidelity. This interconnect bottleneck is equally present in the device fabrication-measurement cycle, which requires high-throughput and cryogenic characterization to develop quantum processors. Here we multiplex quantum transport of two-dimensional electron gases at sub-kelvin temperatures. We use commercial off-the-shelf CMOS multiplexers to achieve an order of magnitude increase in the number of wires. Exploiting this technology, we accelerate the development of 300 mm epitaxial wafers manufactured in an industrial CMOS fab and report a remarkable electron mobility of (3.9 ± 0.6) × 10 5 cm 2 /Vs and percolation density of (6.9 ± 0.4) × 10 10 cm −2 , representing a key step toward large silicon qubit arrays. We envision that the demonstration will inspire the development of cryogenic electronics for quantum information, and because of the simplicity of assembly and versatility, we foresee widespread use of similar cryo-CMOS circuits for high-throughput quantum measurements and control of quantum engineered systems.
Publisher: IOP Publishing
Date: 09-2017
Publisher: IOP Publishing
Date: 03-03-2011
DOI: 10.1088/0957-4484/22/14/145604
Abstract: We demonstrate the preparation of a clean Ge(001) surface with minimal roughness (RMS ~0.6 Å), low defect densities (~0.2% ML) and wide mono-atomic terraces (~80-100 nm). We use an ex situ wet chemical process combined with an in situ anneal treatment followed by a homoepitaxial buffer layer grown by molecular beam epitaxy and a subsequent final thermal anneal. Using scanning tunneling microscopy, we investigate the effect on the surface morphology of using different chemical reagents, concentrations as well as substrate temperature during growth. Such a high quality Ge(001) surface enables the formation of defect-free H-terminated Ge surfaces for subsequent patterning of atomic-scale devices by scanning tunneling lithography. We have achieved atomic-scale dangling bond wire structures 1.6 nm wide and 40 nm long as well as large, micron-size patterns with clear contrast of lithography in STM images.
Publisher: Springer Science and Business Media LLC
Date: 06-04-2023
DOI: 10.1038/S43246-023-00351-W
Abstract: The co-integration of spin, superconducting, and topological systems is emerging as an exciting pathway for scalable and high-fidelity quantum information technology. High-mobility planar germanium is a front-runner semiconductor for building quantum processors with spin-qubits, but progress with hybrid superconductor-semiconductor devices is hindered by the difficulty in obtaining a superconducting hard gap, that is, a gap free of subgap states. Here, we address this challenge by developing a low-disorder, oxide-free interface between high-mobility planar germanium and a germanosilicide parent superconductor. This superconducting contact is formed by the thermally-activated solid phase reaction between a metal, platinum, and the Ge/SiGe semiconductor heterostructure. Electrical characterization reveals near-unity transparency in Josephson junctions and, importantly, a hard induced superconducting gap in quantum point contacts. Furthermore, we demonstrate phase control of a Josephson junction and study transport in a gated two-dimensional superconductor-semiconductor array towards scalable architectures. These results expand the quantum technology toolbox in germanium and provide new avenues for exploring monolithic superconductor-semiconductor quantum circuits towards scalable quantum information processing.
Publisher: American Physical Society (APS)
Date: 27-02-2019
Publisher: AIP Publishing
Date: 02-05-2022
DOI: 10.1063/5.0088576
Abstract: We grow 28Si/SiGe heterostructures by reduced-pressure chemical vapor deposition and terminate the stack without an epitaxial Si cap but with an amorphous Si-rich layer obtained by exposing the SiGe barrier to dichlorosilane at 500 °C. As a result, 28Si/SiGe heterostructure field-effect transistors feature a sharp semiconductor/dielectric interface and support a two-dimensional electron gas with enhanced and more uniform transport properties across a 100 mm wafer. At T = 1.7 K, we measure a high mean mobility of (1.8±0.5)×105 cm2/V s and a low mean percolation density of (9±1)×1010 cm−2. From the analysis of Shubnikov–de Haas oscillations at T = 190 mK, we obtain a long mean single particle relaxation time of (8.1±0.5) ps, corresponding to a mean quantum mobility and quantum level broadening of (7.5±0.6)×104 cm2/V s and (40±3) μeV, respectively, and a small mean Dingle ratio of (2.3±0.2), indicating reduced scattering from long range impurities and a low-disorder environment for hosting high-performance spin-qubits.
Publisher: American Chemical Society (ACS)
Date: 18-11-2021
Publisher: American Physical Society (APS)
Date: 13-06-2005
Publisher: AIP Publishing
Date: 21-03-2022
DOI: 10.1063/5.0083161
Abstract: We demonstrate that a lightly strained germanium channel (ε//=−0.41%) in an undoped Ge/Si0.1Ge0.9 heterostructure field effect transistor supports a two-dimensional (2D) hole gas with mobility in excess of 1×106 cm2/Vs and percolation density less than 5×1010 cm−2. This low disorder 2D hole system shows tunable fractional quantum Hall effects at low densities and low magnetic fields. The low-disorder and small effective mass (0.068me) defines lightly strained germanium as a basis to tune the strength of the spin–orbit coupling for fast and coherent quantum hardware.
Publisher: Elsevier BV
Date: 03-2001
Publisher: Springer Science and Business Media LLC
Date: 13-12-2022
DOI: 10.1038/S41467-022-35458-0
Abstract: Electron spins in Si/SiGe quantum wells suffer from nearly degenerate conduction band valleys, which compete with the spin degree of freedom in the formation of qubits. Despite attempts to enhance the valley energy splitting deterministically, by engineering a sharp interface, valley splitting fluctuations remain a serious problem for qubit uniformity, needed to scale up to large quantum processors. Here, we elucidate and statistically predict the valley splitting by the holistic integration of 3D atomic-level properties, theory and transport. We find that the concentration fluctuations of Si and Ge atoms within the 3D landscape of Si/SiGe interfaces can explain the observed large spread of valley splitting from measurements on many quantum dot devices. Against the prevailing belief, we propose to boost these random alloy composition fluctuations by incorporating Ge atoms in the Si quantum well to statistically enhance valley splitting.
Publisher: Springer Science and Business Media LLC
Date: 19-07-2018
DOI: 10.1038/S41467-018-05299-X
Abstract: Superconductors and semiconductors are crucial platforms in the field of quantum computing. They can be combined to hybrids, bringing together physical properties that enable the discovery of new emergent phenomena and provide novel strategies for quantum control. The involved semiconductor materials, however, suffer from disorder, hyperfine interactions or lack of planar technology. Here we realise an approach that overcomes these issues altogether and integrate gate-defined quantum dots and superconductivity into germanium heterostructures. In our system, heavy holes with mobilities exceeding 500,000 cm 2 (Vs) −1 are confined in shallow quantum wells that are directly contacted by annealed aluminium leads. We observe proximity-induced superconductivity in the quantum well and demonstrate electric gate-control of the supercurrent. Germanium therefore has great promise for fast and coherent quantum hardware and, being compatible with standard manufacturing, could become a leading material for quantum information processing.
Publisher: Springer Science and Business Media LLC
Date: 10-07-2020
DOI: 10.1038/S41467-020-17211-7
Abstract: Qubits based on quantum dots have excellent prospects for scalable quantum technology due to their compatibility with standard semiconductor manufacturing. While early research focused on the simpler electron system, recent demonstrations using multi-hole quantum dots illustrated the favourable properties holes can offer for fast and scalable quantum control. Here, we establish a single-hole spin qubit in germanium and demonstrate the integration of single-shot readout and quantum control. We deplete a planar germanium double quantum dot to the last hole, confirmed by radio-frequency reflectrometry charge sensing. To demonstrate the integration of single-shot readout and qubit operation, we show Rabi driving on both qubits. We find remarkable electric control over the qubit resonance frequencies, providing great qubit addressability. Finally, we analyse the spin relaxation time, which we find to exceed one millisecond, setting the benchmark for hole quantum dot qubits. The ability to coherently manipulate a single hole spin underpins the quality of strained germanium and defines an excellent starting point for the construction of quantum hardware.
Publisher: Springer Science and Business Media LLC
Date: 08-07-2019
DOI: 10.1038/S41565-019-0488-9
Abstract: Silicon spin qubits are one of the leading platforms for quantum computation
Publisher: Elsevier BV
Date: 2013
Publisher: Springer Science and Business Media LLC
Date: 17-06-2023
DOI: 10.1038/S41534-023-00727-3
Abstract: Simulations using highly tunable quantum systems may enable investigations of condensed matter systems beyond the capabilities of classical computers. Quantum dots and donors in semiconductor technology define a natural approach to implement quantum simulation. Several material platforms have been used to study interacting charge states, while gallium arsenide has also been used to investigate spin evolution. However, decoherence remains a key challenge in simulating coherent quantum dynamics. Here, we introduce quantum simulation using hole spins in germanium quantum dots. We demonstrate extensive and coherent control enabling the tuning of multi-spin states in isolated, paired, and fully coupled quantum dots. We then focus on the simulation of resonating valence bonds and measure the evolution between singlet product states which remains coherent over many periods. Finally, we realize four-spin states with s -wave and d -wave symmetry. These results provide means to perform non-trivial and coherent simulations of correlated electron systems.
Publisher: Springer Science and Business Media LLC
Date: 10-08-2015
DOI: 10.1038/SREP12948
Abstract: Extending chip performance beyond current limits of miniaturisation requires new materials and functionalities that integrate well with the silicon platform. Germanium fits these requirements and has been proposed as a high-mobility channel material, a light emitting medium in silicon-integrated lasers and a plasmonic conductor for bio-sensing. Common to these erse applications is the need for homogeneous, high electron densities in three-dimensions (3D). Here we use a bottom-up approach to demonstrate the 3D assembly of atomically sharp doping profiles in germanium by a repeated stacking of two-dimensional (2D) high-density phosphorus layers. This produces high-density (10 19 to 10 20 cm −3 ) low-resistivity (10 −4 Ω · cm) metallic germanium of precisely defined thickness, beyond the capabilities of diffusion-based doping technologies. We demonstrate that free electrons from distinct 2D dopant layers coalesce into a homogeneous 3D conductor using anisotropic quantum interference measurements, atom probe tomography and density functional theory.
Publisher: SPIE
Date: 27-01-2017
DOI: 10.1117/12.2253841
Publisher: The Electrochemical Society
Date: 20-07-2018
Publisher: American Scientific Publishers
Date: 06-2007
Publisher: American Physical Society (APS)
Date: 17-09-2020
Publisher: Elsevier BV
Date: 02-2011
Publisher: Wiley
Date: 22-03-2007
Publisher: The Electrochemical Society
Date: 09-09-2018
DOI: 10.1149/OSF.IO/3FVQN
Abstract: As CMOS scaling proceeds with sub-10 nm nodes, new architectures and materials are implemented to continue increasing performances at constant footprint. Strained and stacked channels and 3D-integrated devices have for instance been introduced for this purpose. A common requirement for these new technologies is a strict limitation in thermal budgets to preserve the integrity of devices already present on the chips. We present our latest developments on low-temperature epitaxial growth processes, ranging from channel to source/drain applications for a variety of devices and describe options to address the upcoming challenges.
Publisher: Springer Science and Business Media LLC
Date: 19-01-2022
DOI: 10.1038/S41586-021-04182-Y
Abstract: Fault-tolerant quantum computers that can solve hard problems rely on quantum error correction
Publisher: Elsevier BV
Date: 03-2008
Publisher: The Electrochemical Society
Date: 07-08-2014
Abstract: In this paper we review the state of the art of high n -type doping techniques in germanium alternative to ion implantation.We discuss a novel technique for achieving ultra-high doping based on adsorption and thermal incorporation of P atoms from PH 3 or P 2 molecules into a Ge surface and subsequent encapsulation by Ge homoepitaxial growth. This process results in the formation of spatially-confined P δ-layers with planar electrically active densities as high as 1×10 14 cm -2 . Owing to the high morphological quality of the crystal matrix, it is possible to stack an arbitrary number of δ-layers and tailor the thickness of spacer layers in between to build an electrically active donor density in excess of 10 20 cm -3 in a bottom-up process.
Publisher: American Physical Society (APS)
Date: 23-12-2009
Publisher: American Physical Society (APS)
Date: 09-07-2019
Publisher: Royal Society of Chemistry (RSC)
Date: 2013
DOI: 10.1039/C3NR34258A
Abstract: We review our recent research into n-type doping of Ge for nanoelectronics and integrated photonics. We demonstrate a doping method in ultra-high vacuum to achieve high electron concentrations in Ge while maintaining atomic-level control of the doping process. We integrated this doping technique with ultra-high vacuum scanning tunneling microscope lithography and femtosecond laser ablation micron-scale lithography, and demonstrated basic components of donor-based nanoelectronic circuitry such as wires and tunnel gaps. By repetition of controlled doping cycles we have shown that stacking of multiple Ge:P two-dimensional electron gases results in high electron densities in Ge (>10(20) cm(-3)). Because of the strong vertical electron confinement, closely stacked 2D layers - although interacting - maintain their in iduality in terms of electron transport. These results bode well towards the realization of nanoscale 3D epitaxial circuits in Ge comprising stacked 2DEGs and/or atomic-scale Ge:P devices with confinement in more dimensions.
Publisher: IOP Publishing
Date: 28-01-2021
Abstract: We engineer planar Ge/SiGe heterostructures for low disorder and quiet hole quantum dot operation by positioning the strained Ge channel 55 nm below the semiconductor/dielectric interface. In heterostructure field effect transistors, we measure a percolation density for two-dimensional hole transport of 2.1 × 10 10 cm −2 , indicative of a very low disorder potential landscape experienced by holes in the buried Ge channel. These Ge heterostructures support quiet operation of hole quantum dots and we measure an average charge noise level of S E ̄ = 0.6 μ eV / Hz at 1 Hz, with the lowest level below our detection limit S E = 0.2 μ eV / Hz . These results establish planar Ge as a promising platform for scaled two-dimensional spin qubit arrays.
Publisher: AIP Publishing
Date: 26-11-2007
DOI: 10.1063/1.2815926
Abstract: We present an ultrahigh vacuum technique for depositing SiO2 at room temperature using an atomic oxygen source and Si coevaporation for ultimate use as a dielectric for gating Si devices with atomically precise dopant profiles. The resulting SiO2 layers were characterized in situ by scanning tunneling microscopy, ex situ by transmission electron microscopy and ellipsometry and integrated as the gate dielectric in a metal oxide semiconductor field effect transistor (MOSFET). The electrical characteristics of the MOSFETs were investigated at 4.2K, giving an interface trap density of ∼1011cm−2 from conductance and Hall effect measurements.
Publisher: AIP Publishing
Date: 05-10-2020
DOI: 10.1063/5.0012883
Abstract: Solid-state qubits integrated on semiconductor substrates currently require at least one wire from every qubit to the control electronics, leading to a so-called wiring bottleneck for scaling. Demultiplexing via on-chip circuitry offers an effective strategy to overcome this bottleneck. In the case of gate-defined quantum dot arrays, specific static voltages need to be applied to many gates simultaneously to realize electron confinement. When a charge-locking structure is placed between the quantum device and the demultiplexer, the voltage can be maintained locally. In this study, we implement a switched-capacitor circuit for charge-locking and use it to float the plunger gate of a single quantum dot. Parallel plate capacitors, transistors, and quantum dot devices are monolithically fabricated on a Si/SiGe-based substrate to avoid complex off-chip routing. We experimentally study the effects of the capacitor and transistor size on the voltage accuracy of the floating node. Furthermore, we demonstrate that the electrochemical potential of the quantum dot can follow a 100 Hz pulse signal while the dot is partially floating, which is essential for applying this strategy in qubit experiments.
Publisher: American Physical Society (APS)
Date: 27-03-2023
Publisher: Springer Science and Business Media LLC
Date: 11-2022
Publisher: American Physical Society (APS)
Date: 05-09-2023
Publisher: Springer Science and Business Media LLC
Date: 23-04-2021
DOI: 10.1038/S41535-021-00344-3
Abstract: Excitons are promising candidates for generating superfluidity and Bose–Einstein condensation (BEC) in solid-state devices, but an enabling material platform with in-built band structure advantages and scaling compatibility with industrial semiconductor technology is lacking. Here we predict that spatially indirect excitons in a lattice-matched strained Si/Ge bilayer embedded into a germanium-rich SiGe crystal would lead to observable mass-imbalanced electron–hole superfluidity and BEC. Holes would be confined in a compressively strained Ge quantum well and electrons in a lattice-matched tensile strained Si quantum well. We envision a device architecture that does not require an insulating barrier at the Si/Ge interface, since this interface offers a type II band alignment. Thus the electrons and holes can be kept very close but strictly separate, strengthening the electron–hole pairing attraction while preventing fast electron–hole recombination. The band alignment also allows a one-step procedure for making independent contacts to the electron and hole layers, overcoming a significant obstacle to device fabrication. We predict superfluidity at experimentally accessible temperatures of a few Kelvin and carrier densities up to ~6 × 10 10 cm −2 , while the large imbalance of the electron and hole effective masses can lead to exotic superfluid phases.
Publisher: AIP Publishing
Date: 21-08-2023
DOI: 10.1063/5.0160847
Abstract: Semiconductor spin qubits have gained increasing attention as a possible platform to host a fault-tolerant quantum computer. First demonstrations of spin qubit arrays have been shown in a wide variety of semiconductor materials. The highest performance for spin qubit logic has been realized in silicon, but scaling silicon quantum dot arrays in two dimensions has proven to be challenging. By taking advantage of high-quality heterostructures and carefully designed gate patterns, we are able to form a tunnel coupled 2 × 2 quantum dot array in a 28Si/SiGe heterostructure. We are able to load a single electron in all four quantum dots, thus reaching the (1,1,1,1) charge state. Furthermore, we characterize and control the tunnel coupling between all pairs of dots by measuring polarization lines over a wide range of barrier gate voltages. Tunnel couplings can be tuned from about 30 μeV up to approximately 400 μeV. These experiments provide insightful information on how to design 2D quantum dot arrays and constitute a first step toward the operation of spin qubits in 28Si/SiGe quantum dots in two dimensions.
Publisher: American Physical Society (APS)
Date: 18-07-2006
Publisher: Springer Science and Business Media LLC
Date: 19-06-2023
DOI: 10.1038/S41467-023-39334-3
Abstract: Practical Quantum computing hinges on the ability to control large numbers of qubits with high fidelity. Quantum dots define a promising platform due to their compatibility with semiconductor manufacturing. Moreover, high-fidelity operations above 99.9% have been realized with in idual qubits, though their performance has been limited to 98.67% when driving two qubits simultaneously. Here we present single-qubit randomized benchmarking in a two-dimensional array of spin qubits, finding native gate fidelities as high as 99.992(1)%. Furthermore, we benchmark single qubit gate performance while simultaneously driving two and four qubits, utilizing a novel benchmarking technique called N -copy randomized benchmarking, designed for simple experimental implementation and accurate simultaneous gate fidelity estimation. We find two- and four-copy randomized benchmarking fidelities of 99.905(8)% and 99.34(4)% respectively, and that next-nearest neighbor pairs are highly robust to cross-talk errors. These characterizations of single-qubit gate quality are crucial for scaling up quantum information technology.
Publisher: AIP Publishing
Date: 20-04-2009
DOI: 10.1063/1.3123391
Abstract: Phosphorus (P) in germanium (Ge) δ-doped layers are fabricated in ultrahigh vacuum by adsorption of phosphine molecules onto an atomically flat clean Ge(001) surface followed by thermal incorporation of P into the lattice and epitaxial Ge overgrowth by molecular beam epitaxy. Structural and electrical characterizations show that P atoms are confined, with minimal diffusion, into an ultranarrow 2-nm-wide layer with an electrically active sheet carrier concentration of 4×1013 cm−2 at 4.2 K. These results open up the possibility of ultranarrow source/drain regions with unprecedented carrier densities for Ge n-channel field effect transistors.
Publisher: AIP Publishing
Date: 15-04-2013
DOI: 10.1063/1.4801981
Publisher: Wiley
Date: 25-03-2022
Abstract: A hole bilayer in a strained germanium double quantum well is designed, fabricated, and studied. Magnetotransport characterization of double quantum well field‐effect transistors as a function of gate voltage reveals the population of two hole channels with a high combined mobility of and a low percolation density of . The in idual population of the channels from the interference patterns of the Landau fan diagram was resolved. At a density of the system is in resonance and an anti‐crossing of the first two bilayer subbands is observed and a symmetric‐antisymmetric gap of is estimated, in agreement with Schrödinger‐Poisson simulations.
Publisher: Springer Science and Business Media LLC
Date: 06-04-2023
Publisher: IEEE
Date: 12-2016
Publisher: Springer Science and Business Media LLC
Date: 13-03-2023
DOI: 10.1038/S41467-023-36951-W
Abstract: Charge noise in the host semiconductor degrades the performance of spin-qubits and poses an obstacle to control large quantum processors. However, it is challenging to engineer the heterogeneous material stack of gate-defined quantum dots to improve charge noise systematically. Here, we address the semiconductor-dielectric interface and the buried quantum well of a 28 Si/SiGe heterostructure and show the connection between charge noise, measured locally in quantum dots, and global disorder in the host semiconductor, measured with macroscopic Hall bars. In 5 nm thick 28 Si quantum wells, we find that improvements in the scattering properties and uniformity of the two-dimensional electron gas over a 100 mm wafer correspond to a significant reduction in charge noise, with a minimum value of 0.29 ± 0.02 μeV/Hz ½ at 1 Hz averaged over several quantum dots. We extrapolate the measured charge noise to simulated dephasing times to CZ -gate fidelities that improve nearly one order of magnitude. These results point to a clean and quiet crystalline environment for integrating long-lived and high-fidelity spin qubits into a larger system.
Publisher: IOP Publishing
Date: 04-01-2013
DOI: 10.1088/0957-4484/24/4/045303
Abstract: Three-dimensional (3D) control of dopant profiles in silicon is a critical requirement for fabricating atomically precise transistors. We demonstrate conductance modulation through an atomic scale 3 nm wide δ-doped silicon-phosphorus wire using a vertically separated epitaxial doped Si:P top-gate. We show that intrinsic crystalline silicon grown at low temperatures (∼250 °C) serves as an effective gate dielectric permitting us to achieve large gate ranges (∼2.6 V) with leakage currents below 1 pA. Combining scanning tunneling lithography for precise lateral confinement, with monolayer doping and low temperature epitaxial overgrowth for precise vertical confinement, we can realize multiple layers of nano-patterned dopants in a single crystal material. These results demonstrate the viability of highly doped, vertically separated epitaxial gates in an all-crystalline architecture with long-term implications for monolithic 3D silicon circuits and for the realization of atomically precise donor architectures for quantum computing.
Publisher: Wiley
Date: 12-2022
Abstract: Atom probes generate three‐dimensional atomic‐scale tomographies of material volumes corresponding to the size of modern‐day solid‐state devices. Here, the capabilities of atom probe tomography are evaluated to analyze buried interfaces in semiconductor heterostructures relevant for electronic and quantum devices. Employing brute‐force search, the current dominant reconstruction protocol to generate tomographic three‐dimensional images from Atom Probe data is advanced to its limits. Using Si/SiGe heterostructure for qubits as a model system, the authors show that it is possible to extract interface properties like roughness and width that agree with transmission electron microscopy observations on the sub‐nanometer scale in an automated and highly reproducible manner. The demonstrated approach is a versatile method for atomic‐scale characterization of buried interfaces in semiconductor heterostructures.
Publisher: American Physical Society (APS)
Date: 28-10-2020
Publisher: IEEE
Date: 06-2014
Publisher: American Chemical Society (ACS)
Date: 30-05-2013
DOI: 10.1021/NN4016407
Abstract: Low resistivity, near-surface doping in silicon represents a formidable challenge for both the microelectronics industry and future quantum electronic devices. Here we employ an ultra-high vacuum strategy to create highly abrupt doping profiles in silicon, which we characterize in situ using a four point probe scanning tunnelling microscope. Using a small molecule gaseous dopant source (PH3) which densely packs on a reconstructed silicon surface, followed by encapsulation in epitaxial silicon, we form highly conductive dopant sheets with subnanometer control of the depth profiles. This approach allows us to test the limits of ultra-shallow junction formation, with room temperature resistivities of 780 Ω/□ at an encapsulation depth of 4.3 nm, increasing to 23 kΩ/□ at an encapsulation depth of only 0.5 nm. We show that this depth-dependent resistivity can be accounted for by a combination of dopant segregation and surface scattering.
Publisher: AIP Publishing
Date: 08-07-2003
DOI: 10.1063/1.1592883
Abstract: We report the characterization of a single-electron transistor based on bended wires fabricated on modulation-doped SiGe two-dimensional electron gas. Electrical measurements show a diamond-shaped stability plot and a nonperiodic sequence of conductance peaks. The device behavior suggests the presence of disorder-induced multiple islands along the wire. Conductance oscillations remain well pronounced above liquid helium temperature.
Publisher: AIP Publishing
Date: 25-01-2010
DOI: 10.1063/1.3299726
Publisher: AIP Publishing
Date: 19-09-2016
DOI: 10.1063/1.4962976
Abstract: We study plasmonic nanoantennas for molecular sensing in the mid-infrared made of heavily doped germanium, epitaxially grown with a bottom-up doping process and featuring free carrier density in excess of 1020 cm−3. The dielectric function of the 250 nm thick germanium film is determined, and bow-tie antennas are designed, fabricated, and embedded in a polymer. By using a near-field photoexpansion mapping technique at λ = 5.8 μm, we demonstrate the existence in the antenna gap of an electromagnetic energy density hotspot of diameter below 100 nm and confinement volume 105 times smaller than λ3.
Publisher: American Association for the Advancement of Science (AAAS)
Date: 09-03-2018
Abstract: To help develop quantum circuits, much effort has been directed toward achieving the strong-coupling regime by using gate-defined semiconductor quantum dots. Potentially, the magnetic dipole, or spin, of a single electron for use as a qubit has advantages over charge-photon coupling owing to its longer lifetime. Samkharadze et al. hybridized the electron spin with the electron charge in a double silicon quantum dot. This approach yielded strong coupling between the single electron spin and a single microwave photon, providing a route to scalable quantum circuits with spin qubits. Science , this issue p. 1123
Publisher: Springer Science and Business Media LLC
Date: 21-08-2019
DOI: 10.1038/S41467-019-11742-4
Abstract: Planar Josephson junctions (JJs) made in semiconductor quantum wells with large spin-orbit coupling are capable of hosting topological superconductivity. Indium antimonide (InSb) two-dimensional electron gases (2DEGs) are particularly suited for this due to their large Landé g-factor and high carrier mobility, however superconducting hybrids in these 2DEGs remain unexplored. Here we create JJs in high quality InSb 2DEGs and provide evidence of ballistic superconductivity over micron-scale lengths. A Zeeman field produces distinct revivals of the supercurrent in the junction, associated with a 0− π transition. We show that these transitions can be controlled by device design, and tuned in-situ using gates. A comparison between experiments and the theory of ballistic π -Josephson junctions gives excellent quantitative agreement. Our results therefore establish InSb quantum wells as a promising new material platform to study the interplay between superconductivity, spin-orbit interaction and magnetism.
Publisher: AIP Publishing
Date: 24-02-2020
DOI: 10.1063/5.0002013
Abstract: Electrons and holes confined in quantum dots define excellent building blocks for quantum emergence, simulation, and computation. Silicon and germanium are compatible with standard semiconductor manufacturing and contain stable isotopes with zero nuclear spin, thereby serving as excellent hosts for spins with long quantum coherence. Here, we demonstrate quantum dot arrays in a silicon metal-oxide-semiconductor (SiMOS), strained silicon (Si/SiGe), and strained germanium (Ge/SiGe). We fabricate using a multi-layer technique to achieve tightly confined quantum dots and compare integration processes. While SiMOS can benefit from a larger temperature budget and Ge/SiGe can make an Ohmic contact to metals, the overlapping gate structure to define the quantum dots can be based on a nearly identical integration. We realize charge sensing in each platform, for the first time in Ge/SiGe, and demonstrate fully functional linear and two-dimensional arrays where all quantum dots can be depleted to the last charge state. In Si/SiGe, we tune a quintuple quantum dot using the N + 1 method to simultaneously reach the few electron regime for each quantum dot. We compare capacitive crosstalk and find it to be the smallest in SiMOS, relevant for the tuning of quantum dot arrays. We put these results into perspective for quantum technology and identify industrial qubits, hybrid technology, automated tuning, and two-dimensional qubit arrays as four key trajectories that, when combined, enable fault-tolerant quantum computation.
Publisher: American Chemical Society (ACS)
Date: 11-01-2019
DOI: 10.1021/ACS.NANOLETT.8B04275
Abstract: Hybrid superconductor-semiconductor structures attract increasing attention owing to a variety of potential applications in quantum computing devices. They can serve the realization of topological superconducting systems as well as gate-tunable superconducting quantum bits. Here, we combine a SiGe/Ge/SiGe quantum-well heterostructure hosting high-mobility two-dimensional holes and aluminum superconducting leads to realize prototypical hybrid devices, such as Josephson field-effect transistors (JoFETs) and superconducting quantum interference devices (SQUIDs). We observe gate-controlled supercurrent transport with Ge channels as long as one micrometer and estimate the induced superconducting gap from tunnel spectroscopy measurements. Transmission electron microscopy reveals the diffusion of Ge into the Al contacts, whereas no Al is detected in the Ge channel.
Publisher: Wiley
Date: 23-01-2019
Publisher: Springer Science and Business Media LLC
Date: 28-09-2022
DOI: 10.1038/S41586-022-05117-X
Abstract: Future quantum computers capable of solving relevant problems will require a large number of qubits that can be operated reliably 1 . However, the requirements of having a large qubit count and operating with high fidelity are typically conflicting. Spins in semiconductor quantum dots show long-term promise 2,3 but demonstrations so far use between one and four qubits and typically optimize the fidelity of either single- or two-qubit operations, or initialization and readout 4–11 . Here, we increase the number of qubits and simultaneously achieve respectable fidelities for universal operation, state preparation and measurement. We design, fabricate and operate a six-qubit processor with a focus on careful Hamiltonian engineering, on a high level of abstraction to program the quantum circuits, and on efficient background calibration, all of which are essential to achieve high fidelities on this extended system. State preparation combines initialization by measurement and real-time feedback with quantum-non-demolition measurements. These advances will enable testing of increasingly meaningful quantum protocols and constitute a major stepping stone towards large-scale quantum computers.
Publisher: Springer Science and Business Media LLC
Date: 27-10-2022
DOI: 10.1038/S41534-022-00639-8
Abstract: The fault-tolerant operation of logical qubits is an important requirement for realizing a universal quantum computer. Spin qubits based on quantum dots have great potential to be scaled to large numbers because of their compatibility with standard semiconductor manufacturing. Here, we show that a quantum error correction code can be implemented using a four-qubit array in germanium. We demonstrate a resonant SWAP gate and by combining controlled-Z and controlled-S −1 gates we construct a Toffoli-like three-qubit gate. We execute a two-qubit phase flip code and find that we can preserve the state of the data qubit by applying a refocusing pulse to the ancilla qubit. In addition, we implement a phase flip code on three qubits, making use of a Toffoli-like gate for the final correction step. Both the quality and quantity of the qubits will require significant improvement to achieve fault-tolerance. However, the capability to implement quantum error correction codes enables co-design development of quantum hardware and software, where codes tailored to the properties of spin qubits and advances in fabrication and operation can now come together to advance semiconductor quantum technology.
Publisher: American Physical Society (APS)
Date: 13-08-2012
Publisher: IOP Publishing
Date: 09-2014
Publisher: IOP Publishing
Date: 14-03-2014
DOI: 10.1088/0957-4484/25/14/145302
Abstract: We investigate the ability to introduce strain into atomic-scale silicon device fabrication by performing hydrogen lithography and creating electrically active phosphorus δ-doped silicon on strained silicon-on-insulator (sSOI) substrates. Lithographic patterns were obtained by selectively desorbing hydrogen atoms from a H resist layer adsorbed on a clean, atomically flat sSOI(001) surface with a scanning tunnelling microscope tip operating in ultra-high vacuum. The influence of the tip-to-s le bias on the lithographic process was investigated allowing us to pattern feature-sizes from several microns down to 1.3 nm. In parallel we have investigated the impact of strain on the electrical properties of P:Si δ-doped layers. Despite the presence of strain inducing surface variations in the silicon substrate we still achieve high carrier densities (>1.0 × 10(14) cm(-2)) with mobilities of ∼100 cm(2) V(-1) s(-1). These results open up the possibility of a scanning-probe lithography approach to the fabrication of strained atomic-scale devices in silicon.
Publisher: Elsevier BV
Date: 12-2003
Publisher: IEEE
Date: 12-2018
Publisher: Springer Science and Business Media LLC
Date: 19-01-2022
DOI: 10.1038/S41586-021-04273-W
Abstract: High-fidelity control of quantum bits is paramount for the reliable execution of quantum algorithms and for achieving fault tolerance—the ability to correct errors faster than they occur 1 . The central requirement for fault tolerance is expressed in terms of an error threshold. Whereas the actual threshold depends on many details, a common target is the approximately 1% error threshold of the well-known surface code 2,3 . Reaching two-qubit gate fidelities above 99% has been a long-standing major goal for semiconductor spin qubits. These qubits are promising for scaling, as they can leverage advanced semiconductor technology 4 . Here we report a spin-based quantum processor in silicon with single-qubit and two-qubit gate fidelities, all of which are above 99.5%, extracted from gate-set tomography. The average single-qubit gate fidelities remain above 99% when including crosstalk and idling errors on the neighbouring qubit. Using this high-fidelity gate set, we execute the demanding task of calculating molecular ground-state energies using a variational quantum eigensolver algorithm 5 . Having surpassed the 99% barrier for the two-qubit gate fidelity, semiconductor qubits are well positioned on the path to fault tolerance and to possible applications in the era of noisy intermediate-scale quantum devices.
Publisher: American Physical Society (APS)
Date: 29-04-2022
Publisher: IOP Publishing
Date: 22-08-2011
DOI: 10.1088/0957-4484/22/37/375203
Abstract: In this paper we demonstrate the fabrication of multiple, narrow, and closely spaced δ-doped P layers in Ge. The P profiles are obtained by repeated phosphine adsorption onto atomically flat Ge(001) surfaces and subsequent thermal incorporation of P into the lattice. A dual-temperature epitaxial Ge overgrowth separates the layers, minimizing dopant redistribution and guaranteeing an atomically flat starting surface for each doping cycle. This technique allows P atomic layer doping in Ge and can be scaled up to an arbitrary number of doped layers maintaining atomic level control of the interface. Low sheet resistivities (280 Ω/ [symbol see text ) and high carrier densities (2 × 10(14) cm( - 2), corresponding to 7.4 × 10(19) cm( - 3)) are demonstrated at 4.2 K.
Publisher: IOP Publishing
Date: 06-11-2009
DOI: 10.1088/0957-4484/20/49/495302
Abstract: In this paper we demonstrate atomic-scale lithography on hydrogen terminated Ge(001). The lithographic patterns were obtained by selectively desorbing hydrogen atoms from a H resist layer adsorbed on a clean, atomically flat Ge(001) surface with a scanning tunneling microscope tip operating in ultra-high vacuum. The influence of the tip-to-s le bias on the lithographic process have been investigated. Lithographic patterns with feature-sizes from 200 to 1.8 nm have been achieved by varying the tip-to-s le bias. These results open up the possibility of a scanning-probe lithography approach to the fabrication of future atomic-scale devices in germanium.
Publisher: IOP Publishing
Date: 06-08-2021
Abstract: Single-charge pumps are the main candidates for quantum-based standards of the unit ere because they can generate accurate and quantized electric currents. In order to approach the metrological requirements in terms of both accuracy and speed of operation, in the past decade there has been a focus on semiconductor-based devices. The use of a variety of semiconductor materials enables the universality of charge pump devices to be tested, a highly desirable demonstration for metrology, with GaAs and Si pumps at the forefront of these tests. Here, we show that pumping can be achieved in a yet unexplored semiconductor, i.e. germanium. We realise a single-hole pump with a tunable-barrier quantum dot electrostatically defined at a Ge/SiGe heterostructure interface. We observe quantized current plateaux by driving the system with a single sinusoidal drive up to a frequency of 100 MHz. The operation of the prototype was affected by accidental formation of multiple dots, probably due to disorder potential, and random charge fluctuations. We suggest straightforward refinements of the fabrication process to improve pump characteristics in future experiments.
Publisher: American Physical Society (APS)
Date: 25-04-2023
Publisher: Springer Science and Business Media LLC
Date: 28-08-2023
DOI: 10.1038/S41565-023-01491-3
Abstract: The efficient control of a large number of qubits is one of the most challenging aspects for practical quantum computing. Current approaches in solid-state quantum technology are based on brute-force methods, where each and every qubit requires at least one unique control line—an approach that will become unsustainable when scaling to the required millions of qubits. Here, inspired by random-access architectures in classical electronics, we introduce the shared control of semiconductor quantum dots to efficiently operate a two-dimensional crossbar array in planar germanium. We tune the entire array, comprising 16 quantum dots, to the few-hole regime. We then confine an odd number of holes in each site to isolate an unpaired spin per dot. Moving forward, we demonstrate on a vertical and a horizontal double quantum dot a method for the selective control of the interdot coupling and achieve a tunnel coupling tunability over more than 10 GHz. The operation of a quantum electronic device with fewer control terminals than tunable experimental parameters represents a compelling step forward in the construction of scalable quantum technology.
Publisher: American Physical Society (APS)
Date: 31-07-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 03-2007
Publisher: Inderscience Publishers
Date: 2008
Publisher: Springer Science and Business Media LLC
Date: 21-12-2020
Publisher: American Chemical Society (ACS)
Date: 13-11-2013
DOI: 10.1021/NN4051634
Abstract: The achievement of controlled high n-type doping in Ge will enable the fabrication of a number of innovative nanoelectronic and photonic devices. In this work, we present a combined scanning tunneling microscopy, secondary ions mass spectrometry, and magnetotransport study to understand the atomistic doping process of Ge by P2 molecules. Harnessing the one-dimer footprint of P2 molecules on the Ge(001) surface, we achieved the incorporation of a full P monolayer in Ge using a relatively low process temperature. The consequent formation of P-P dimers, however, limits electrical activation above a critical donor density corresponding to P-P spacing of less than a single dimer row. With this insight, tuning of doping parameters allows us to repeatedly stack such 2D P layers to achieve 3D electron densities up to ∼2 × 10(20) cm(-3).
Publisher: IEEE
Date: 08-2007
Publisher: Springer Science and Business Media LLC
Date: 24-03-2021
DOI: 10.1038/S41586-021-03332-6
Abstract: The prospect of building quantum circuits
Publisher: American Chemical Society (ACS)
Date: 28-03-2023
Publisher: AIP Publishing
Date: 25-01-2021
DOI: 10.1063/5.0037330
Abstract: Quantum dots fabricated using methods compatible with semiconductor manufacturing are promising for quantum information processing. In order to fully utilize the potential of this platform, scaling quantum dot arrays along two dimensions is a key step. Here, we demonstrate a two-dimensional quantum dot array where each quantum dot is tuned to single-charge occupancy, verified by simultaneous measurements using two integrated radio frequency charge sensors. We achieve this by using planar germanium quantum dots with low disorder and a small effective mass, allowing the incorporation of dedicated barrier gates to control the coupling of the quantum dots. We measure the hole charge filling spectrum and show that we can tune single-hole quantum dots from isolated quantum dots to strongly exchange coupled quantum dots. These results motivate the use of planar germanium quantum dots as building blocks for quantum simulation and computation.
Publisher: AIP Publishing
Date: 24-03-2014
DOI: 10.1063/1.4869111
Abstract: We develop a super-saturation technique to extend the previously established doping density limit for ultra-high vacuum monolayer doping of silicon with phosphorus. Through an optimized sequence of PH3 dosing and annealing of the silicon surface, we demonstrate a 2D free carrier density of ns = (3.6 ± 0.1) × 1014 cm−2, ∼50% higher than previously reported values. We perform extensive characterization of the dopant layer resistivity, including room temperature depth-dependent in situ four point probe measurements. The dopant layers remain conductive at less than 1 nm from the s le surface and importantly, surpass the semiconductor industry target for ultra-shallow junction scaling of & Ω◻−1 at a depth of 7 nm.
Publisher: IEEE
Date: 2004
Publisher: Springer Science and Business Media LLC
Date: 04-05-2017
DOI: 10.1038/SREP46670
Abstract: We report quantum transport measurements on two dimensional (2D) Si:P and Ge:P δ -layers and compare the inelastic scattering rates relevant for weak localization (WL) and universal conductance fluctuations (UCF) for devices of various doping densities (0.3–2.5 × 10 18 m −2 ) at low temperatures (0.3–4.2 K). The phase breaking rate extracted experimentally from measurements of WL correction to conductivity and UCF agree well with each other within the entire temperature range. This establishes that WL and UCF, being the outcome of quantum interference phenomena, are governed by the same dephasing rate.
Publisher: American Chemical Society (ACS)
Date: 24-08-2020
Publisher: American Physical Society (APS)
Date: 06-09-2013
Publisher: American Physical Society (APS)
Date: 25-10-2023
Publisher: Springer Science and Business Media LLC
Date: 12-05-2021
DOI: 10.1038/S41586-021-03469-4
Abstract: The most promising quantum algorithms require quantum processors that host millions of quantum bits when targeting practical applications
Publisher: American Physical Society (APS)
Date: 07-07-2023
Publisher: Springer Science and Business Media LLC
Date: 30-09-2022
DOI: 10.1038/S41467-022-33453-Z
Abstract: Control of entanglement between qubits at distant quantum processors using a two-qubit gate is an essential function of a scalable, modular implementation of quantum computation. Among the many qubit platforms, spin qubits in silicon quantum dots are promising for large-scale integration along with their nanofabrication capability. However, linking distant silicon quantum processors is challenging as two-qubit gates in spin qubits typically utilize short-range exchange coupling, which is only effective between nearest-neighbor quantum dots. Here we demonstrate a two-qubit gate between spin qubits via coherent spin shuttling, a key technology for linking distant silicon quantum processors. Coherent shuttling of a spin qubit enables efficient switching of the exchange coupling with an on/off ratio exceeding 1000, while preserving the spin coherence by 99.6% for the single shuttling between neighboring dots. With this shuttling-mode exchange control, we demonstrate a two-qubit controlled-phase gate with a fidelity of 93%, assessed via randomized benchmarking. Combination of our technique and a phase coherent shuttling of a qubit across a large quantum dot array will provide feasible path toward a quantum link between distant silicon quantum processors, a key requirement for large-scale quantum computation.
Publisher: Springer Science and Business Media LLC
Date: 20-07-2022
DOI: 10.1038/S41534-022-00597-1
Abstract: We demonstrate a 36 × 36 gate electrode crossbar that supports 648 narrow-channel field effect transistors (FET) for gate-defined quantum dots, with a quadratic increase in quantum dot count upon a linear increase in control lines. The crossbar is fabricated on an industrial 28 Si-MOS stack and shows 100% FET yield at cryogenic temperature. We observe a decreasing threshold voltage for wider channel devices and obtain a normal distribution of pinch-off voltages for nominally identical tunnel barriers probed over 1296 gate crossings. Macroscopically across the crossbar, we measure an average pinch-off of 1.17 V with a standard deviation of 46.8 mV, while local differences within each unit cell indicate a standard deviation of 23.1 mV. These disorder potential landscape variations translate to 1.2 and 0.6 times the measured quantum dot charging energy, respectively. Such metrics provide means for material and device optimization and serve as guidelines in the design of large-scale architectures for fault-tolerant semiconductor-based quantum computing.
Publisher: American Chemical Society (ACS)
Date: 04-01-2023
Publisher: American Chemical Society (ACS)
Date: 10-05-2011
DOI: 10.1021/NL200449V
Abstract: Despite the rapidly growing interest in Ge for ultrascaled classical transistors and innovative quantum devices, the field of Ge nanoelectronics is still in its infancy. One major hurdle has been electron confinement since fast dopant diffusion occurs when traditional Si CMOS fabrication processes are applied to Ge. We demonstrate a complete fabrication route for atomic-scale, donor-based devices in single-crystal Ge using a combination of scanning tunneling microscope lithography and high-quality crystal growth. The cornerstone of this fabrication process is an innovative lithographic procedure based on direct laser patterning of the semiconductor surface, allowing the gap between atomic-scale STM-patterned structures and the outside world to be bridged. Using this fabrication process, we show electron confinement in a 5 nm wide phosphorus-doped nanowire in single-crystal Ge. At cryogenic temperatures, Ohmic behavior is observed and a low planar resistivity of 8.3 kΩ/□ is measured.
No related grants have been discovered for Giordano Scappucci.