ORCID Profile
0000-0002-3869-412X
Current Organisation
University of Technology Sydney
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In Research Link Australia (RLA), "Research Topics" refer to ANZSRC FOR and SEO codes. These topics are either sourced from ANZSRC FOR and SEO codes listed in researchers' related grants or generated by a large language model (LLM) based on their publications.
Renewable Power and Energy Systems Engineering (excl. Solar Cells) | Electrical and Electronic Engineering | Power and Energy Systems Engineering (excl. Renewable Power) | Circuits and Systems
Energy Conservation and Efficiency not elsewhere classified | Energy Systems Analysis |
Publisher: IEEE
Date: 03-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: IEEE
Date: 26-06-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2014
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2022
Publisher: IEEE
Date: 06-2012
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 08-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2021
Publisher: IEEE
Date: 29-11-2020
Publisher: Hindawi Limited
Date: 30-04-2021
DOI: 10.1002/ER.6797
Publisher: IEEE
Date: 06-2013
Publisher: MDPI AG
Date: 13-09-2021
DOI: 10.3390/EN14185751
Abstract: This paper presents a systematic topological study to derive all possible basic and non-isolated three-port converters (TPCs) using power flow diagrams. Unlike most reported TPCs with one bidirectional port, this paper considers up to two bidirectional ports and provides a comprehensive analytical tool. This tool acts as a framework for all power flow combinations, selection, and design. Some viable converter configurations have been identified and selected for further analysis.
Publisher: IEEE
Date: 09-2018
Publisher: IEEE
Date: 03-2018
Publisher: Elsevier BV
Date: 02-2022
Publisher: IEEE
Date: 09-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2016
Publisher: MDPI AG
Date: 16-07-2022
DOI: 10.3390/EN15145159
Abstract: The software-assisted reliability assessment of power electronic converters is increasingly important due to its multi-domain nature and extensive parametric calculations. The rainflow counting algorithm is gaining popularity for its low relative error in device lifetime estimation. Nevertheless, the offline operation of the algorithm prevents most simulation software packages considering other parameters for the device under study, such as aging and the current state of health in the estimation, as it requires a complete loading profile to run recursive comparison. This also brings difficulties in realization in circuit simulators such as SPICE. To tackle the issue, an in-the-loop circuit-based rainflow counting algorithm is proposed in this paper, and applied to estimate the consumed lifetime of the MOSFET in a boost converter for illustration. Instantaneous electrical and thermal performances, and the accumulated stress of the device can be monitored. Not only does this assist in evaluating the state of health of a device, but also allows the possibility of integrating the aging into the lifetime evaluation. The method follows the four-point rainflow counting algorithms, which continuously compares three adjacent temperature fluctuations ΔTj to select full cycles for two rounds, and the remaining cycles are counted as half cycles. To validate the performance, a comparative analysis in terms of counting accuracy and simulation speed was performed alongside the proposed method, MATLAB® and also with a well-accepted half-cycle counting method. Reported results show that the proposed method has an improved counting accuracy compared to the half-cycle counting from 24% to 3.5% on average under different load stresses and length conditions. The accuracy can be effectively improved by a further 1.3–2% by adding an extra comparison round.
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 03-2023
Publisher: IEEE
Date: 09-2019
Publisher: Institution of Engineering and Technology (IET)
Date: 11-2014
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2019
Publisher: IEEE
Date: 07-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 04-2021
Publisher: IEEE
Date: 03-2016
Publisher: Springer Science and Business Media LLC
Date: 22-12-2012
DOI: 10.1007/S00267-012-0003-7
Abstract: The small mountainous country Nepal is situated in the central part of the Himalayas. Its climate varies from tropical in the south to arctic in the north and natural vegetation follows the pattern of climate and altitude. Water-induced disaster problems including soil erosion, debris flow, landslides and flooding are common due to the unstable landscape. Soil erosion is the most important driving force for the degradation of upland and mountain ecosystems. Soil bioengineering has been used in Nepal for nearly 30 years to deal with erosion problems on slopes, in high way construction and riverbank stabilization. The main soil bioengineering techniques used in Nepal are brush layering, palisades, live check dams, fascines and vegetative stone pitching. This study is based on the geology, climate and vegetation of Nepal and briefly summarizes the application of soil bioengineering on slopes and stream banks, with especial attention to the role of vegetation on slope and stream bank stabilization. Furthermore, this paper addresses the role of community participation and responsibility for successful application of vegetation-based techniques in management, maintenance and utility aspects for the future. In recent years, soil bioengineering techniques are extensively used due to their cost-effectiveness, using locally available materials and low-cost labour in comparison to more elaborate civil engineering works. However, scientific implementation and record-keeping and evaluation of the work are indeed essential.
Publisher: IEEE
Date: 06-2017
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2023
Publisher: IEEE
Date: 06-12-2021
Publisher: IEEE
Date: 09-2010
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 05-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 06-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2022
Publisher: IEEE
Date: 03-2018
Publisher: IEEE
Date: 07-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 08-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2021
Publisher: Nepal Journals Online (JOL)
Date: 1970
DOI: 10.3126/ON.V5I1.801
Abstract: The varied bioclimatic conditions of Nepal favour the introduction of different invasive alien weeds. Mikania micrantha (L.) Kunth is one of the well established invasive alien weeds in the tropical part of eastern and central Nepal. The weed has been caused serious problems in the forests, grasslands, fallow lands, croplands and wetlands of the Koshi Tappu Wildlife Reserve and its buffer zone. It kills other plants by blocking sunlight and smothering them. The Reserve has initiated to manage the weed with local community in the buffer zone. The paper attempts to highlight the problem of Mikania in the Koshi Tappu area and the efforts of community to manage the weed. Keywords: Mikania micrantha, invasive alien weed, Koshi Tappu, Nepaldoi:10.3126/on.v5i1.801Our Nature (2007)5:70-74
Publisher: Institution of Engineering and Technology (IET)
Date: 15-04-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2017
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2015
Publisher: Elsevier
Date: 2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 06-2023
Publisher: IEEE
Date: 10-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2020
Publisher: IEEE
Date: 05-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2021
Publisher: IEEE
Date: 11-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2021
Publisher: Wiley
Date: 23-12-2021
DOI: 10.1002/CTA.3199
Abstract: Single‐inductor multi‐input single‐output (SI‐MISO) switching DC‐DC power converter architecture is a cost effective solution to applications where multiple input sources are required to be managed with a limited space and cost. This paper presents a new time‐multiplexed hysteretic control (TMHC) scheme for SI‐DISO topology to decouple the power sharing among two input sources. Unlike previously reported solutions with discontinuous conduction or pseudo‐continuous conduction operation of the inductor, this paper focuses on how to keep the inductor current in a continuous conduction mode (CCM) and proposed a control scheme with considerably lower ripple current with fast transition time upon switching and higher efficiency. The mathematical proof using the expressions of inductor ripple current, comparison between efficiency and transition time from one level to other, is derived. Additionally, a low‐cost analog circuitry has been implemented to incorporate the proposed control scheme. Experimental results from the hardware prototype are given to verify the proposed control scheme.
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2020
Publisher: IEEE
Date: 15-05-2022
Publisher: IEEE
Date: 15-05-2022
Publisher: Institution of Engineering and Technology (IET)
Date: 21-09-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2023
Publisher: Institution of Engineering and Technology (IET)
Date: 07-2020
Publisher: EEEIC International Publishing
Date: 2017
Abstract: Boost converters are needed in many applications which require the output voltage to be higher than the input voltage. Recently, boost type converters have been applied for industrial applications, and hence it has become an interesting topic of research. Many researchers proposed different impedance source converters with their unique advantages as having a high voltage gain in a small range of duty cycle ratio. However, the thermal behaviour of the semiconductor devices and passive elements in the impedance source converter is an important issue from a reliability point of view and it has not been investigated yet. Therefore, this paper presents a comparison between the conventional boost, the Z-source, and the Y-source converters based on a thermal evaluation of the semiconductors. In addition, the three topologies are also compared with respect to their efficiency. In this study the results show that the boost converter has higher efficiency than the Zsource and Y-source converter for these specific voltage gain of 2 and 4. The operational principle, mathematical derivations, simulation results and final comparisons are presented in this paper.
Publisher: IEEE
Date: 03-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 08-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 04-2015
Publisher: IEEE
Date: 10-10-2021
Publisher: MDPI AG
Date: 15-11-2021
DOI: 10.3390/ELECTRONICS10222801
Abstract: This paper proposes two improved cascaded H-bridge (ICHB) multilevel inverters that feature voltage-boosting capability. The conventional H-bridge with a front-end dc–dc boost converter was restructured for single-stage operation. The developed three-level topology not only saves one power switch but also exhibits lower voltage stress across its capacitor. Extension to five-level generation was also introduced by merely adding two power switches and one capacitor. The final five-level topology outperforms the classical cascaded H-bridge (CHB) multilevel inverter with a significant reduction in the power switch count, with a 42% and 50% reduction in both the isolated dc source and inductor counts. The power efficiency was also improved without compromising the modularity feature of the classical CHB multilevel inverter. The operation and theoretical analysis of the proposed topologies were validated via simulations and experimental tests.
Publisher: IEEE
Date: 03-2017
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 07-2014
Publisher: IEEE
Date: 03-2013
Publisher: IEEE
Date: 09-2019
Publisher: Institution of Engineering and Technology (IET)
Date: 17-11-2022
DOI: 10.1049/RPG2.12630
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2015
Publisher: IEEE
Date: 03-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 08-2023
Publisher: Institution of Engineering and Technology (IET)
Date: 09-2014
Publisher: Institution of Engineering and Technology (IET)
Date: 22-03-2021
DOI: 10.1049/PEL2.12111
Publisher: Institution of Engineering and Technology (IET)
Date: 20-04-2021
DOI: 10.1049/PEL2.12110
Publisher: IEEE
Date: 10-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 03-2019
Publisher: IEEE
Date: 02-02-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 07-2016
Publisher: IEEE
Date: 09-2018
Publisher: IEEE
Date: 03-2017
Publisher: IEEE
Date: 08-2014
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 03-2020
Publisher: IEEE
Date: 26-06-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 07-2022
Publisher: IEEE
Date: 09-2016
Publisher: IEEE
Date: 10-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 06-2021
Publisher: IEEE
Date: 06-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 04-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2016
Publisher: IEEE
Date: 10-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 08-2022
Publisher: IEEE
Date: 07-2018
Publisher: MDPI AG
Date: 14-12-2022
DOI: 10.3390/ELECTRONICS11244174
Abstract: Today, transformerless inverters (TIs) are widely applicable in different solar photovoltaic (PV) grid-connected applications owing to their promising features, such as higher efficiency and power density. However, high-frequency common-mode voltage (CMV) in these topologies can result in high leakage current, electromagnetic interference, and lack of safety, reducing the whole system’s reliability. To resolve the problems associated with TIs, this paper proposes a novel hybrid switched capacitor (SC)-based common-ground (CG) transformerless inverter (TI) topology, which can be applied in grid-connected photovoltaic (PV) applications. The boost inductor is integrated to achieve continuous input current and dynamic voltage gain. In addition, the proposed circuit comprises nine switches and two SCs with a single input DC source. It can generate five-level AC voltage with voltage boosting within a single-stage DC–AC power conversion. The working principles of the proposed topology, circuit description, and control technique are presented. Furthermore, the proposed inverter is comprehensively compared with other five-level TIs to show its superiority. Finally, a laboratory prototype is developed and tested to validate the practical viability of the proposed configuration.
Publisher: IEEE
Date: 03-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2015
Publisher: Engineering and Technology Publishing
Date: 2020
Publisher: IEEE
Date: 03-2020
Publisher: IEEE
Date: 09-2015
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 06-2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 04-2021
Publisher: Institution of Engineering and Technology (IET)
Date: 12-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 04-2023
Publisher: IEEE
Date: 10-10-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2020
Publisher: IEEE
Date: 12-11-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: IEEE
Date: 15-05-2022
Publisher: IEEE
Date: 03-2014
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2023
Publisher: Institute of Electrical Engineers of Japan (IEE Japan)
Date: 09-2020
Publisher: Institution of Engineering and Technology (IET)
Date: 11-2016
Publisher: IEEE
Date: 10-10-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2021
Publisher: IEEE
Date: 09-2019
Publisher: IEEE
Date: 06-2014
Publisher: Institution of Engineering and Technology (IET)
Date: 16-07-2021
DOI: 10.1049/PEL2.12142
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 02-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 03-2018
Publisher: IEEE
Date: 09-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2022
Publisher: IEEE
Date: 29-11-2020
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2021
Publisher: IEEE
Date: 11-2011
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: IEEE
Date: 09-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 07-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 08-2020
Publisher: IEEE
Date: 10-10-2021
Publisher: IEEE
Date: 05-2014
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2022
Publisher: IEEE
Date: 02-2019
Publisher: IEEE
Date: 12-2017
Publisher: IEEE
Date: 09-12-2022
Publisher: MDPI AG
Date: 24-06-2022
DOI: 10.3390/ELECTRONICS11131973
Abstract: This paper proposes a universal converter that is capable of operating in three modes for generating positive dc voltage, negative dc voltage, and sinusoidal ac voltage. By controlling the duty-cycle of two half-bridges, an inductor is operated at a high frequency to control the voltage across two film capacitors that constitute a dual-buck-boost converter. Two additional half-bridges operating at a fixed state or line frequency are used to select the mode of operation. Compared to the latest universal converter in the recent literature, the proposed topology has the same switch count while reducing the number of conducting switches for inductor current and reducing the number of switches operating at high frequency. The operation of the proposed dual-buck-boost dc–dc/ac universal converter is analyzed. Experimental results are presented for validation. The power conversion efficiency of the 100 W experimental prototype modeled in PLECS is approximately 98%.
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: IEEE
Date: 29-11-2020
Publisher: IEEE
Date: 24-05-2021
Publisher: IEEE
Date: 09-2016
Publisher: Wiley
Date: 14-03-2021
DOI: 10.1002/CTA.2931
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2021
Publisher: IEEE
Date: 03-2018
Publisher: IEEE
Date: 03-2020
Publisher: Wiley
Date: 23-03-2021
DOI: 10.1002/CTA.3004
Abstract: This paper proposes a new switched‐capacitor nine‐level (9L) inverter with reduced switch count. In the proposed topology, floating capacitor (FC) is employed as a voltage booster, and it does not need any additional sensors to maintain the voltage across the FC. Due to additional FC, the number of dc sources and voltage stress on switches is reduced. Moreover, the proposed topology can be cascaded to achieve more voltage levels. Various parameters are considered in the comparison of the proposed topology with other recent switched‐capacitor topologies. Simulation and experimental results demonstrate the performance with different load and modulation index variations.
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2021
Publisher: IEEE
Date: 03-2013
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 09-2022
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: IEEE
Date: 09-2019
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 07-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 10-2022
Publisher: IEEE
Date: 06-2016
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2021
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2022
Publisher: IEEE
Date: 03-2018
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 11-2017
Publisher: Institution of Engineering and Technology
Date: 11-2015
DOI: 10.1049/PBPO074E_CH7
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2020
Publisher: Institution of Engineering and Technology (IET)
Date: 26-04-2019
Publisher: IEEE
Date: 09-2016
Publisher: IEEE
Date: 09-2019
Publisher: IEEE
Date: 09-2015
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 05-2023
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 2023
Publisher: IEEE
Date: 29-03-2022
Publisher: IEEE
Date: 03-2018
Publisher: Institution of Engineering and Technology (IET)
Date: 26-08-2021
DOI: 10.1049/PEL2.12181
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2022
Publisher: IEEE
Date: 03-2017
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Date: 12-2020
Start Date: 2021
End Date: 12-2024
Amount: $348,503.00
Funder: Australian Research Council
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