Design Automation for Processor Pipelines. Embedded system processors comprise about eighty percent of the processor market. This project targets this particular segment, customising multi-processor system on chips for a particular class of embedded applications, resulting in superior performance, low power and reduced cost. Direct benefits will include clear understanding of architectures and algorithms, research training, better processors for the embedded market, and quality publications. Ind ....Design Automation for Processor Pipelines. Embedded system processors comprise about eighty percent of the processor market. This project targets this particular segment, customising multi-processor system on chips for a particular class of embedded applications, resulting in superior performance, low power and reduced cost. Direct benefits will include clear understanding of architectures and algorithms, research training, better processors for the embedded market, and quality publications. Indirect benefits will be commercialisation and licensing of this technology for use in the embedded systems design industry. Companies which can benefit from this technology exist in Australia and overseas.Read moreRead less
Automatic Co-Processor Synthesis for Application Specific Instruction Set Processors. Embedded system processors comprise of about eighty percent of the processor market. This project targets this particular segment, customising processors for a particular embedded application, resulting in superior performance, low power and reduced cost. Direct benefits will include clear understanding of architectures and algorithms, research training, better processors for the embedded market, and quality ....Automatic Co-Processor Synthesis for Application Specific Instruction Set Processors. Embedded system processors comprise of about eighty percent of the processor market. This project targets this particular segment, customising processors for a particular embedded application, resulting in superior performance, low power and reduced cost. Direct benefits will include clear understanding of architectures and algorithms, research training, better processors for the embedded market, and quality publications. Indirect benefits will be commercialisation and licensing of this technology for use in the processor design industry. Read moreRead less
Low Power Architectures for the Wavelet Transform and JPEG2000. Recently a new international standard for image compression has been proposed, JPEG2000. This new method updates the well established JPEG standard and will be incorporated into digital cameras, web pads, etc.
In this project we will investigate low power architectures for the wavelet transforms used in this standard, and combine this with an embedded processor core to deliver a complete system on a chip solution for low power JPEG ....Low Power Architectures for the Wavelet Transform and JPEG2000. Recently a new international standard for image compression has been proposed, JPEG2000. This new method updates the well established JPEG standard and will be incorporated into digital cameras, web pads, etc.
In this project we will investigate low power architectures for the wavelet transforms used in this standard, and combine this with an embedded processor core to deliver a complete system on a chip solution for low power JPEG2000.Read moreRead less
Reliable Truly Deep Sub-micron VLSI Computational Systems. The phenomenal growth of the digital integrated circuits is founded on the fundamental assumption of reliable operation of logic gates on silicon chip. In the Deep Sub-Micron domain this fundamental assumption can no longer be guaranteed. This project, in association with with Dongshin University, Korea with strong links to the semiconductor industry, will develop design techniques for the reliable computational hardware, in the presence ....Reliable Truly Deep Sub-micron VLSI Computational Systems. The phenomenal growth of the digital integrated circuits is founded on the fundamental assumption of reliable operation of logic gates on silicon chip. In the Deep Sub-Micron domain this fundamental assumption can no longer be guaranteed. This project, in association with with Dongshin University, Korea with strong links to the semiconductor industry, will develop design techniques for the reliable computational hardware, in the presence of unreliable circuit fabric. This significant research, with potential for generation of IP, will raise the profile of Australian research in integrated circuits design in the global community and will result in significant publicity for the research team and, through them, for Australian industry.Read moreRead less
Design and Formal Verification of Control and Data Acquisition Protocols. This research will develop new specification and verification techniques for remote control protocols, used among interconnected sites in supply utilities such as electricity grids, based on a proven formal methods technology. These protocols are used in the monitoring of data from remote sites, and the transmission of control commands to such sites from a central location. Benefits to the industrial partner include increa ....Design and Formal Verification of Control and Data Acquisition Protocols. This research will develop new specification and verification techniques for remote control protocols, used among interconnected sites in supply utilities such as electricity grids, based on a proven formal methods technology. These protocols are used in the monitoring of data from remote sites, and the transmission of control commands to such sites from a central location. Benefits to the industrial partner include increased assurance that their control technology does correctly realise the adopted protocols. Assurance of correctness is significant in that incorrect protocol implementation may cause errant operation of equipment, and lead to economic and environmental damage.Read moreRead less
RNS Hardware for Public-Key Cryptography and E-security. In a world where electronic communication is ever-present, the security of electronic information, e-security, is an issue of the utmost concern for government, business and individuals alike. Public-key cryptography is a powerful tool in the e-security toolkit. Using this technology it is possible to confirm the identity of individuals, maintain the privacy of personal data and guarantee the authenticity of transactions.
The aim of this ....RNS Hardware for Public-Key Cryptography and E-security. In a world where electronic communication is ever-present, the security of electronic information, e-security, is an issue of the utmost concern for government, business and individuals alike. Public-key cryptography is a powerful tool in the e-security toolkit. Using this technology it is possible to confirm the identity of individuals, maintain the privacy of personal data and guarantee the authenticity of transactions.
The aim of this project is to design new public-key cryptography hardware to provide faster, more secure communications for computers, networks and smart cards. Achieving this will require innovations in the way computers perform arithmetic and how this arithmetic is realised as an integrated circuit.Read moreRead less
Hardware Implementation Strategies for JPEG 2000. JPEG2000 is a new image compression standard, which is expected to become the dominant format for image communications over the internet and then make inroads into consumer peripheral devices, including digital cameras, printers and scanners. The standard is fundamentally different from and much more complex than its well-known predecessor, JPEG, and there are currently no published hardware implementations. The aim of this project is to investig ....Hardware Implementation Strategies for JPEG 2000. JPEG2000 is a new image compression standard, which is expected to become the dominant format for image communications over the internet and then make inroads into consumer peripheral devices, including digital cameras, printers and scanners. The standard is fundamentally different from and much more complex than its well-known predecessor, JPEG, and there are currently no published hardware implementations. The aim of this project is to investigate a wide range of potential implementation strategies to identify those which are able to minimize the consumption of various resources, including memory consumption, memory bandwidth, chip area and processing latency.Read moreRead less
Electronic Auditory Pathway. We will develop electronic building blocks to investigate biological signal processing. In particular, we will investigate the auditory pathway and develop the most accurate electronic model of the biological cochlea and auditory nerve. These will be followed by electronic circuits that model the processing of sensory signals in the brain. Processing signals with neural spikes offers distinct advantages over current analogue and digital signal processing techniques i ....Electronic Auditory Pathway. We will develop electronic building blocks to investigate biological signal processing. In particular, we will investigate the auditory pathway and develop the most accurate electronic model of the biological cochlea and auditory nerve. These will be followed by electronic circuits that model the processing of sensory signals in the brain. Processing signals with neural spikes offers distinct advantages over current analogue and digital signal processing techniques in terms of noise, energy consumption and extraction of temporal information. We will implement the first spike-based models of pitch and timbre perception, and a neural model of speech recognition in noisy environments.Read moreRead less