Hardware-based accelerators for real-time machine learning. This project will tackle the challenge of applying real-time machine learning to massive high-frequency data. This project will leverage advancements in machine learning and hardware synthesis to implement computationally complex machine-learning algorithms on hardware-accelerated platforms, avoiding overhead delays incurred by software running on a processor.
Performance Practice in New Interfaces for Realtime Electronic Music Performance. Results will be reported at national and international conferences both academic and commercial. Manuscripts will be prepared for submission to international refereed scholarly journals. Articles for rapid communication to a popular and commercial audience in areas of music technology, electronic arts, HCI and IT will also be prepared.
Reconfigurable System-on-Chip for Computer Network Appliances. As Internet connectivity becomes ubiquitous, so does the need for computer network security. As algorithms become more sophisticated, and network speeds increase, software-only implementations of network security applications become less feasible on small, embedded network appliances. This project investigates new computer architectures, based on reconfigurable System-on-Chip technology, which can improve algorithm speed through sp ....Reconfigurable System-on-Chip for Computer Network Appliances. As Internet connectivity becomes ubiquitous, so does the need for computer network security. As algorithms become more sophisticated, and network speeds increase, software-only implementations of network security applications become less feasible on small, embedded network appliances. This project investigates new computer architectures, based on reconfigurable System-on-Chip technology, which can improve algorithm speed through specialised instruction sets, hardware accelerators, and parallel processing. Research outcomes will be commercialised by the project's industry partner - a global leader in low-cost network security appliances.Read moreRead less
FPGA Controller Architectures for Safety Critical Applications. The project industry partner, Invensys Rail Systems, has a major design group in Australia, who work with railway signalling systems throughout the world. Invensys are keen to adopt new technologies to more efficiently and effectively implement signalling functions. However, the safety-critical nature of railway signalling means that any new technology must be analysed in detail to bring it to an acceptable technical readiness lev ....FPGA Controller Architectures for Safety Critical Applications. The project industry partner, Invensys Rail Systems, has a major design group in Australia, who work with railway signalling systems throughout the world. Invensys are keen to adopt new technologies to more efficiently and effectively implement signalling functions. However, the safety-critical nature of railway signalling means that any new technology must be analysed in detail to bring it to an acceptable technical readiness level. The outcomes of this research will be an improved technical readiness level for FPGAs in signalling systems, and this will allow Invensys' Australian design group to develop new technologies and allow them to compete more effectively in the global marketplace.Read moreRead less
Towards a high density silicon phase change memory device. This project builds upon our exciting recent findings that amorphous silicon can be transformed to a conducting crystalline phase following small-scale indentation. Furthermore the process is reversible as re-indentation can induce a transformation back to insulating amorphous silicon. This process appears to occur in extremely small (nanoscale) volumes of silicon. We plan to explore the viability of exploiting this behaviour to develo ....Towards a high density silicon phase change memory device. This project builds upon our exciting recent findings that amorphous silicon can be transformed to a conducting crystalline phase following small-scale indentation. Furthermore the process is reversible as re-indentation can induce a transformation back to insulating amorphous silicon. This process appears to occur in extremely small (nanoscale) volumes of silicon. We plan to explore the viability of exploiting this behaviour to develop an entirely new information storage system: a high-density silicon phase change memory. This project aims to study small-scale transformation behaviour in silicon and to design demonstrator memory devices based on both micro-electromechanical systems and solid state technologies.Read moreRead less
Next Generation Grid Enabled Cluster Computers: Performance Optimisation for e-Science. In partnership with a local computer company this project will develop cost effective cluster computing solutions assembled from off-the-shelf parts for $50,000-$200,000. This price range is currently relatively poorly serviced by the multinational computer vendors, who tend to focus on the high density compute systems necessary for very large cluster systems. As a consequence the development of high performa ....Next Generation Grid Enabled Cluster Computers: Performance Optimisation for e-Science. In partnership with a local computer company this project will develop cost effective cluster computing solutions assembled from off-the-shelf parts for $50,000-$200,000. This price range is currently relatively poorly serviced by the multinational computer vendors, who tend to focus on the high density compute systems necessary for very large cluster systems. As a consequence the development of high performance computing in Australia has been somewhat stifled compared to the US or UK, where there exist small niche companies servicing this market sector. This project aims to change this, developing affordable high performance cluster computing systems for the Australian market place and beyond.Read moreRead less